top of page

Compact Modeling & Simulation

  • Development of physical compact models for predictive & statistical design.

  • Development of suitable parameter extraction techniques without experienced device physics engineer. 

  • Implementation of the compact models and parameter extraction algorithms in automatic circuit design tools. 

  • Validation and benchmarking: Compact model evaluation for analog, digital, and RF circuit design- Convergence, CPU time, statistical circuit simulation. 

  • The straightforward understanding of device physics for circuit designers.

  • Education of device & circuit engineer with the knowledge of device physics for a next-generation logic device.

Modeling & Characterization of Low-Frequency Noise

  • Modeling of 1/f noise for Gate-All-Around MOSFET and Tunneling FET

  • Characterization of 1/f noise for Gate-All-Around MOSFET and Tunneling FET

  • Modeling and Simulation of Random Telegraph Noise

Neuromorphic Device & System

  • Development of Artificial Neuron & Synapse

  • Modeling of Neuromorphic Device

  • Simulation of Neuromorphic Circuit

  • Neuromorphic System Design

Radiation Hardening

  • Loss of data

  • Device of destruction

  • Gradual degradation (Vt, Swing, DIBL, etc.)

© 2018 by Next-generation Semiconductor Device Lab Proudly created with Wix.com

bottom of page